TCE Guest Lecture: Obstacles and Chances for Multi-core Deployment in Hard Real-time Systems

Theo Ungerer (CS, University of Augsberg, Germany)
Tuesday, 13.3.2012, 14:30
EE Meyer Building 861

Providing higher performance than state-of-the-art embedded processors can deliver today will increase safety, comfort, number and quality of services, while also lowering emissions as well as fuel demands for automotive, avionic and automation applications. Engineers who design hard real-time embedded systems in such embedded domains express a need for several times the performance available today while keeping safety as major criterion. A breakthrough in performance is expected by parallelising hard real-time applications and running them on an embedded multi-core processor, which enables combining the requirements for high-performance with time-predictable execution.

The talk will discuss results of the EC FP-7 project MERASA (Multi-Core Execution of Hard Real-Time Applications Supporting Analysability, 2007-2011) and objectives of the parMERASA project (Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability, 2011-2014). Both projects target timing analysable systems of parallel hard real-time applications running on a scalable multi-core processor. MERASA delivered a fully timing analysable four-core SMT processor as FPGA prototype together with adapted system software and WCET tools, running a parallelised version of a Honeywell International autonomous flying vehicle code as demonstrator. parMERASA shifts its objectives even more towards parallelisation of hard real-time application software. To this end application companies of avionics, automotive, and construction machinery domains cooperate with tool developers and multi-core architects.

Back to the index of events